1. Field of the Invention
The present invention relates to the field of data communications. More particularly, the present invention relates to the efficient transmission of information over high speed data communicating links.
2. Description of Related Art
It is well-known in the data communications field that for the transmission of high bit rate data signals small differential signals provide a number of advantages. A differential channel provides rejection of common mode noise present between a transmitting and receiving node such as power supply noise. Differential signals can be transmitted on twisted-pair cables which are less expensive than coaxial or fiber optic cables and which when shielded offer very good rejection of interference from external noise sources. Using small signal level differential signals on a shielded twisted-pair cable reduces EMI emissions, simplifies transmitter design and reduces power dissipation.
One of the most important characteristics of a differential communication channel is that it reduces timing distortion due to mismatched rise and fall times and receiver threshold. Timing distortion must be minimized since in a digital communication system data is encoded in both time and amplitude. FIG. 1(a) illustrates a single-ended system with mismatched rise and fall times and a threshold VT. As can be seen the mismatch in rise and fall times causes duty cycle distortion (Tpulse does not equal T.sub.bc where T.sub.bc is the bit cell width and Tpulse is the received pulse width.) It is very difficult in a single-ended communication system to match the rise and fall times and this mismatch becomes significant when data rates become high (50 Mbaud or more).
Differential systems on the other hand do not suffer duty cycle distortion due to rise and fall time mismatch. As shown in FIG. 1(b), as long as signal A and B have equivalent rise times and equivalent fall times the signal's pulse width is preserved. This type of matching is much more simple to guarantee in an integrated circuit design that has a symmetric layout for the A and B signals. It is also important to note that in a differential receiver the threshold is not set externally as in the single-ended system which was set by the VT reference shown in FIG. 1(a). Instead, the threshold in a differential system is a function of the received signal and therefore tracks with the received signal corresponding to when A=B (the signal crossing point).
In developing a differential signal transmission driver for use by CMOS logic circuits, there are a number of constraints to contend with. For example, a voltage driver such as that shown in FIG. 2 used to drive a differential signal on the twisted-pair cable requires an output impedance much less than Zo in order to provide good termination and signal amplitude control. For a typical shielded twisted pair Zo equals approximately 110 ohms. In CMOS to achieve low output impedance requires large devices and large currents, typically four to seven times that required for bipolar transistors. For example, to achieve 10 ohms would typically require 40 ma. FIG. 3 illustrates an alternative CMOS voltage driver to the one shown in FIG. 2. In this alternative, the circuit takes advantage of the fact that CMOS technology provides for good switches. However, this approach requires a separate low voltage power supply in order to provide a small output signal. A 1 volt output signal amplitude requires a supply voltage V' of 2 volts. A 2 volt supply though provides a small overdrive voltage (V.sub.gs -V.sub. t =1 volt) for the CMOS switches. This makes the CMOS switches very large (since the switch resistance must be less than Zo) yielding slow switches. This driver also requires a large drive current of V'/(2Zo)=9 ma.